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The top-down fabrication techniques, which involve photolithographic and subsequent etching techniques, have been used as conventional methods for device scaling in semiconductor industry for integrated electronic systems. However, due to the further downscaling of device size, the top-down approach faces the limitations of photolithographic/etching techniques as well as the increasing costs associated with lithography equipment (Lu and Lieber 2007). One promising method to overcome the limi-tations with the top-down methods is the bottom-up approach, which is a unique technique for fabricating functional devices, without the use of lithography techniques, through the chemical synthesis, self-assembly, and the manipulation of nanoscale elements such as small molecules, nanoparticles, nanotubes, and nanowires (Agarwal 2008). Recently, for the realization of integrated electronic systems through the bottom-up approach, these nanomaterials have attracted considerable interest due to their unique properties such as large surface-to-volume ratio, carrier and photon confinement, and high sensitivity. In particular, various semiconductor nanowires offer great potential as building blocks for nanoscale electronic and photonic device applications.
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