ABSTRACT
The effects of radiation on electronic systems may be addressed at various levels of hierarchy, from the constituent device fabrication processes and circuit designs (topology), to the system configuration and software levels. In some cases, mitigation at any single level may be appropriate and sufficient. For more demanding environments, such as space and weapons systems, and even high-reliability commercial systems, mitigation approaches at multiple levels may be required to achieve the overall target performance. This chapter will describe approaches for optimization of semiconductor device fabrication processes and structures to mitigate radiation effects in advanced silicon-based technologies, primarily complementary metal oxide semiconductor (CMOS).
