ABSTRACT
Phase-locked loops (PLL) are present in virtually every modern integrated circuits (IC) communication system. PLLs are extremely versatile components that are many times necessary to ensure the data integrity in modern ICs. Applications include, but are not limited to, frequency synthesis, frequency modulation and demodulation, clock recovery, skew reduction, highspeed clock signal generation, and data synchronization. As PLLs have become a bottleneck in clock and data path design [1] and are crucial to the overall performance of a system, the transient performance of the PLL is critical to ensure the reliability of the IC.
