ABSTRACT

Complementary metal–oxide–semiconductor (CMOS) scaling faces many serious difficulties due to the approaching fundamental device physics limits. The quantum effects will dominate the device performance as the dimension approaches the sub-10 nm range due to an increase in the gate leakage current, as well as in capacitive coupling, doping, and lithography fluctuations [1]. Many technologies are proposed for the replacement of CMOS technology, such as quantum-dot cellular automata (QCA) [2–4], single electron tunneling (SET) [5], and tunneling phase logic (TPL) [6]. QCA, one of the viable technologies for the implementation of future digital systems, will be the focus of this chapter. QCA technology has excellent features for nanoelectronic integrated circuit implementations, such as extremely high packing densities (1012 devices/cm2), simple interconnections, small signal delays, and low-power consumption. The basic circuit unit for QCA circuits is a three-input majority gate. In addition to developing logic circuits, QCA are also used to create 268interconnects. Thus, large QCA digital circuit architectures can be built using simple structures such as wires, majority gates, and inverters. The focus of this chapter is to present logic synthesis approaches for QCA applications based on majority gates.