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Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology

Edited by: Luciano Lavagno , Igor L. Markov , Grant Martin , Louis K. Scheffer

Print publication date:  April  2016
Online publication date:  February  2017

Print ISBN: 9781482254600
eBook ISBN: 9781315215112
Adobe ISBN:

 Cite  Marc Record

Book description

The second of two volumes in the Electronic Design Automation for Integrated Circuits Handbook, Second Edition, Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology thoroughly examines real-time logic (RTL) to GDSII (a file format used to transfer data of semiconductor physical layout) design flow, analog/mixed signal design, physical verification, and technology computer-aided design (TCAD). Chapters contributed by leading experts authoritatively discuss design for manufacturability (DFM) at the nanoscale, power supply network design and analysis, design modeling, and much more.

New to This Edition:

  • Major updates appearing in the initial phases of the design flow, where the level of abstraction keeps rising to support more functionality with lower non-recurring engineering (NRE) costs
  • Significant revisions reflected in the final phases of the design flow, where the complexity due to smaller and smaller geometries is compounded by the slow progress of shorter wavelength lithography
  • New coverage of cutting-edge applications and approaches realized in the decade since publication of the previous edition?these are illustrated by new chapters on 3D circuit integration and clock design

Offering improved depth and modernity, Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology provides a valuable, state-of-the-art reference for electronic design automation (EDA) students, researchers, and professionals.

Table of contents

Chapter  1:  Design Flows Download PDF
Chapter  2:  Logic Synthesis Download PDF
Chapter  3:  Power Analysis and Optimization from Circuit to Register-Transfer Levels Download PDF
Chapter  4:  Equivalence Checking Download PDF
Chapter  5:  Digital Layout Download PDF
Chapter  6:  Static Timing Analysis Download PDF
Chapter  7:  Structured Digital Design Download PDF
Chapter  8:  Routing Download PDF
Chapter  9:  Physical Design for 3D ICs Download PDF
Chapter  10:  Gate Sizing Download PDF
Chapter  11:  Clock Design and Synthesis Download PDF
Chapter  12:  Exploring Challenges of Libraries for Electronic Design Download PDF
Chapter  13:  Design Closure Download PDF
Chapter  14:  Tools for Chip-Package Co-Design Download PDF
Chapter  15:  Design Databases Download PDF
Chapter  16:  FPGA Synthesis and Physical Design Download PDF
Chapter  17:  Simulation of Analog and RF Circuits and Systems Download PDF
Chapter  18:  Simulation and Modeling for Analog and Mixed-Signal Integrated Circuits Download PDF
Chapter  19:  Layout Tools for Analog Integrated Circuits and Mixed-Signal Systems-on-Chip Download PDF
Chapter  20:  Design Rule Checking Download PDF
Chapter  21:  Resolution Enhancement Techniques and Mask Data Preparation Download PDF
Chapter  22:  Design for Manufacturability in the Nanometer Era Download PDF
Chapter  23:  Nuclear Hydrogen Production: An Overview Download PDF
Chapter  24:  Noise in Digital ICs Download PDF
Chapter  25:  Layout Extraction Download PDF
Chapter  26:  Mixed-Signal Noise Coupling in System-on-Chip Design Download PDF
Chapter  27:  Process Simulation Download PDF
Chapter  28:  Device Modeling: From Physics to Electrical Parameter Extraction Download PDF
Chapter  29:  High-Accuracy Parasitic Extraction Download PDF
prelims Download PDF
Index Download PDF
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